If anyone remembers my last post, i was clueless, but now I actually have a decent grasp of boolean algebra and circuit design. Though I have a question. I have a 4-variable circuit, and the Sum-of-Products circuit needs to be implemented using only NAND gates. I already have the SoP circuit correctly diagrammed, and as I understand, I can keep the same design when converting to NAND, only that the OR gate at the end must be replaced with a NAND, and that NAND gate's output must have another NAND behind it in order to invert it back to an OR gate. But what I haven't confirmed completely is this: can NOT gates be simply replaced by NAND gates? As in, can I literally just replace them in the SoP circuit with NAND's? It seems like a simple concept, and I believe it is correct, I just need verification.

For anyone who wants it, the simplified equation is this (in SoP form):
x1'x2'x3'+x1'x2 x3'+x1 x2'x3'+x1 x2 x3

Sorry I can't use subscripts or bars (the ' = bar = not). The spaces just mean it isn't barred.

Also, when dealing with a complex (or so I think) circuit like this, in order to draw it out the simplest way, where would you start? I would think you would start with the last term, because they all go straight into a NAND, and then you can split them as needed for the others, but so far I haven't heard a correct way to do it. Mine just kinda get sloppy looking at times.

Finally, this will be designed using Quartus II. My teacher told us the link (http://altera.com/literature), for us to figure out how to use this program, but it seems like something I could mess up easily. For anyone who has used this software, do you have any pointers for me? If you need, the device family is MAX7000S and for the design is EMP7128SLC84-7.

Once again I realize this is a long, vague, dragging post, but if anyone could help out, it would be once again greatly appreciated.

Thanks again.

EDIT: Also, when replacing the NOT gate with the NAND, would you split the wire so you have two wires running into the NAND converted from the NOT gate? Like a mushroom thing l=D Crude yes, but you maybe get the idea.

I started out understanding a lot in my Digital systems class but now I'm lost like you. What the hell is DeMorgan's Law???

Ok. I'll try my best.
First off, you use it when you want to complement an equation (like switching it from Pos to SoP form, and vice versa.)

Say you have the Product of Sums (PoS) equation:

f = (x+y+z) (x'+y'+z) (x+y'+z')
Then f', or f complement would be:

_____ _ _____ _ _____ Where the bar is the equivalent of the ', which means complement.
(x+y+z) * (x'+y'+z) * (x+y'+z') The asterisk is just to emphasize the ANDing between each term.

_-_ -_ _ -_ -_ _- _-_
= (x+y+z) + (x'+y'+z) + (x+y'+z') Notice how the AND changed to OR between each term.
Each bar means the term still needs to be complemented. Im taking this step by step so you can see how it exactly works.

Now you complement inside the terms. Remember the ' = - , and that two bars is the same as say, multiplying two negatives in algebra - they cancel each other out. I know it's kinda hard to see which variables are double-barred, but yeah....

After doing that, you will get:


= x'y'z' + xyz' + x'yz

Notice if you look at the original equation, all you did was change every AND (*) sign to an OR (+) sign, and every variable that was complemented (NOTed, if you will) with either a bar or apostrophe ( - or ' ) was uncomplemented, or to make it less technical sounding, everything with an apostrophe lost it's apostrophe, and every variable without a bar gained one, and the signs etween the terms were switched.

You can do this in one step just by looking at it, but 99% of professors want you to show your work. So hopefully this helps. This is the exact equation and steps I learned it by. Just think opposite. When using.

If you want an application outside of simple complementing of equation, think of Karnaugh Maps. They might ask you to take the complement of a K-Map that is originally composed of Maxterms, which are the 0's in the map. Finding the simplest equation for the Maxterms using Product of Sums, you can complement it with DeMorgan's Theorem, giving you the minterm equation, which is the 1's, also known as the Sum of Products equation. So complementing a PoS equation gives you the PoS equation, and vice versa.

Ok. This was very thorough and hopefully easy. Hope it helps. Just some info, I went from not even being able to know how the logic gates worked or even knowing what they look like to getting a frickin A on my first exam - in one week. It just takes a while to click. Oh, and when drawing circuit diagrams, just think it out. If you have xy + yz', just connect x and y inputs to an AND gate, and then run z through a NOT gate first, then run the already NOTed z to an AND gate with Y, and then connect those two AND gates you made into an OR gate. That was another thing that gave me trouble.

Hope this helps.

When I first learned Boolean (right after it was invented) I always built the truth table right beside the expression on a LARGE sheet of paper. The tables were my training wheels and helped me get started.

My answer to your question. In this instance, I think you can safely replace the NOT gates with NAND gates and get away with it. Try it by plugging them in, and running the equation.

Quote: Originally Posted by joecoin When I first learned Boolean (right after it was invented) I always built the truth table right beside the expression on a LARGE sheet of paper. The tables were my training wheels and helped me get started. My answer to your question. In this instance, I think you can safely replace the NOT gates with NAND gates and get away with it. Try it by plugging them in, and running the equation.

Well You can make a NOT (inverter) gate by connecting the inputs of a NAND together, So yes that is true.

So if I understand correctly, you just need to make a adding circuits (sum of) using only NAND gates correct?

Yeah, I had to convert an equation to a NOR only and NAND only implementations. I wasn't sure if I had to split the nand gate inputs when replacing the NOT gate with it. But yeah, I double-checked it and it works. Now I just need to figure out how to use Quartus II to design it...

I have no clue, but I will defend your right to my death... to confuse me !