Bus Speed

Red02 · 24-April-03, 04:22 PM

Was lookin at the new AMD 64bit proc. and i was wondering if i understood this. According to the pic below the Bus is at 1.4GHz? Is that right or am i seeing things?

Maverick · 24-April-03, 05:44 PM

no its saying there isnt a fsb bus because the memery controller is integrated into the chip. What is replacing the front side bus is now the hypertransport bus which is going to run at 800mhz or so ive read. hope that explains it for you.

Red02 · 25-April-03, 06:18 PM

kinda, would have like it though if they would say, its 800mhz. or something.

lcpiper · 25-April-03, 06:44 PM

Right, the old FSB represented the bus speed for the memory bus from CPU to North Bridge chip. Since the memory controller is integrated into the CPU, it runs at Chip speed.

And of course, that 800mhz is going to essential be nothing more the a true 200mhz signal doubled for DDR, and doubled again for AMD's special implementation of Duel Channeling.

24-April-03, 04:22 PM		#1 (permalink)
Red02 Freck-hoe-d	Bus Speed Was lookin at the new AMD 64bit proc. and i was wondering if i understood this. According to the pic below the Bus is at 1.4GHz? Is that right or am i seeing things? Attached Thumbnails

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24-April-03, 05:44 PM		#2 (permalink)
Maverick Apex Elite Expert Tech	no its saying there isnt a fsb bus because the memery controller is integrated into the chip. What is replacing the front side bus is now the hypertransport bus which is going to run at 800mhz or so ive read. hope that explains it for you.

25-April-03, 06:18 PM		#3 (permalink)
Red02 Freck-hoe-d	kinda, would have like it though if they would say, its 800mhz. or something.

25-April-03, 06:44 PM		#4 (permalink)
lcpiper H2-Hoe	Right, the old FSB represented the bus speed for the memory bus from CPU to North Bridge chip. Since the memory controller is integrated into the CPU, it runs at Chip speed. And of course, that 800mhz is going to essential be nothing more the a true 200mhz signal doubled for DDR, and doubled again for AMD's special implementation of Duel Channeling.